MIELi

Doctoral school pilot for microelectronics in Finland

What is MIELi?

The scientific and societal impact of microelectronics is significant, and we need more doctoral level experts in Finland. MIELi is a doctoral school pilot that aims to speed up and improve doctoral education in microelectronics by collaborating with industry and academia. The doctoral school pilot aims at graduation in 3 years with industrially relevant research topics and immediate employment to companies and business after graduation.

Microelectronics is a constructive and complex research field that requires teamwork, advanced infrastructures and tools, and highly skilled and experienced workforce. Microelectronics is the key enabler for ICT and other sectors, such as healthcare, energy, and transportation.

The demand for experts in the field of microelectronics is already very high and growing, and the opportunities in the job market are numerous and versatile. Microelectronics experts can make a real impact on the world by contributing to technologies critical for the future.

MIELi doctoral education pilot involves Finland’s key players in microelectronics research: Aalto University, Tampere University, University of Oulu and VTT. The universities offer the doctoral positions and education, and VTT supports the pilot by offering visiting researcher positions, infrastructures, and guidance. Altogether 30 doctoral positions are open for applications, ten in each partner university.

VTT Technical Research Centre of Finland Ltd

Microelectronics covers four interdependent technology layers:

1. Materials and devices

Materials, process technologies, and devices built on the material science. For example, printed electronics, transistors, MEMS, and standard cell libraries. The scope is on basic building blocks like single transistors.

2. Components and circuits

Components and circuits that compose the layer of electronics based on the foundational devices. For example, macros and circuits of thousands of transistors.

3. System-on-Chip and processors

System-on-Chip and processors. Build on top of previous layer with large and complex constructs like processors and RF Transceivers. The SoC itself can include billion transistors.

4. Microelectronics enabled applications

Applications that essentially require one or more of the other layers to be realized.

The project has the following objectives:

Increasing the number of doctoral level experts in microelectronics in Finland
shortening the doctoral education to three years
immediate employment of the graduates in industry and business
developing and harmonizing doctoral education in Finland and contributing it to the EU programs
elevating doctoral degree appreciation among students as the basic level of education, and
growing strategic partnerships with companies enabling and deploying microelectronics.

To reach these goals and support the doctoral candidates, the pilot will have clearly defined doctoral thesis topics, network-wide training and joint courses, personal career development plans and supervision. The project will also aim at streamlining the evaluation process and enhancing research infrastructures.

For whom?

The pilot is targeted for experienced life-long learners currently working in companies, as well as for candidates that have just graduated. The pilot aims at rapid graduation, for which reason the students must have firm master level education on the field without need for any preparatory or completing studies before the doctoral education.

Positions

MIELi offers in total 30 job positions distributed as ten positions for each university. There are several pre-defined topics (referred to as Topic ID) available and possibility to propose student’s own topic. Pre-defined topics are provided by the research groups and supervisors listed with the topic title and description.

AALTO1: Advanced Si substrates for RF applications

Today's RF devices, e.g. timing chips, consist of a Si substrate and different thin films stacked on top. Unfortunately these thin films typically contain electric charge, and thus, when deposited on top of the Si wafer, a harmful conductive surface layer is formed to the substrate. This conductive layer, also known as parasitic surface conductivity (PSC), causes distortion in the RF signals and should thus be avoided for optimal device performance. In this position the goal is to develop new solutions to mitigate the PSC-layer. Additionally new characterization methods for the PSC-layer properties are to be developed. Microelectronics area: 1 Host location: Aalto University Research Group: Electron Physics Group Primary contact / supervisor: Hele Savin
AALTO2: Cost-effective Ge-on-Si microchips

In this position the aim is to develop fully CMOS-compatible sensors with close to ideal performance on inexpensive Ge-on-Si substrates. The idea is to utilize the superior Ge material properties such as high mobility and narrow band gap, yet simultaneously allowing CMOS circuits to be integrated into the same wafer (Si substrate). Novel gate oxide materials will be applied and special emphasis paid on the interface quality between oxide and Ge. Additionally new characterization methods for the Ge-on-Si substrates are to be developed. Microelectronics area: 1 Host location: Aalto University Research Group: Electron Physics Group Primary contact / supervisor: Hele Savin
AALTO3: Novel metal-to-Si contacts

All devices in microelectronics utilize ohmic contacts between metals and semiconductors. Conventionally these contacts are achieved by ion implantation causing damage, recombination losses and requiring the use of high temperature adding complexity and material restrictions. In this position the aim is to study and develop novel methods for ohmic contact formation providing benefit to the whole semiconductor industry. After successfull experimental demonstration of proper ohmic contacts, the ultimate goal is to integrate the developed concepts and methods into actual devices. Microelectronics area: 1 Host location: Aalto University Research Group: Electron Physics Group Primary contact / supervisor: Hele Savin
AALTO4: Heterogeneous integration for extremely miniaturized, smart sensor systems

Development of next generation smaller and faster sensor chips is constrained by the limited data transfer rates within sensor and logic devices in a system. Advanced and emerging packaging technologies offer solutions to integrate MEMS and logic dies to realize system-in-package (SiP) thereby offering several advantages, such as reduced latency, increased design flexibility and reliability. This research work aims to combine two microfabricated platforms – 3D PiezoMEMS and solid-liquid-interdiffusion (SLID) bonding developed at Aalto University. 3D PiezoMEMS is an advance piezoelectric MEMS sensor capable of full 3D motion, whereas SLID is a wafer-level bonding technology with an advantage of reduced bonding temperature. The goal of the work is to demonstrate beyond state-of-the-art MEMS package with fast speed, high density interconnect solutions enabling sensor systems with increased intelligence. Microelectronics area: 2 Host location: Aalto University Research Group: Mervi Paulasto-Kröckel Primary contact / supervisor: Mervi Paulasto-Kröckel
AALTO5: Aluminium Nitride based polarization doped field effect transistor

Aluminum nitride (AlN) and high-Al-content AlGaN are in the spotlight as materials for the next-generation wide band gap (WBG) devices. However, AlN-based vertical devices with ideal electrical properties have yet to be realized. A major technical challenge for these devices is achieving controlled conductivity across a broad range. Distributed polarization doping (DPD) has recently been proposed as a unique doping technology for nitride semiconductors. In this work the candidate will develop Metal-Organic Vapor Phase Epitaxy (MOVPE) deposition processes for single crystalline high Al-content AlGaN films and investigate distributed polarization doping (DPD) techniques for p- and n- doping. Goal of the work is to demonstrate DPD AlN p-n diode and POLFET. Microelectronics area: 1 Host location: Aalto University Research Group: Mervi Paulasto-Kröckel / VTT Primary contact / supervisor: Mervi Paulasto-Kröckel
AALTO6: Nanostructured carbon-based bio detector

Carbon nanomaterials have gained high interest for bioelectrochemical applications like biosensors and biofuel cells related to excellent conductivities, well-established bio functionalization methods, and high surface area to immobilize a high number of biomolecules preserving accessibility for its substrate. Besides the huge varieties of different nanosized carbon structures, the principal materials used in this field are carbon nanotubes and graphene. Nanosized sp2 allotropes of carbon behave electrochemically almost the same as macroscopic carbon electrodes but the formation of porous structures provokes an extension of the electrode with drastically enhanced surface area. Interestingly, there are little quantitative studies about the effective enhancement of the electroactive surface using nanocarbon materials. In this work, the candidate will investigate nanostructured carbon deposition methods and the use of nanostructured carbon in bio-detectors. Microelectronics area: 1 Host location: Aalto University Research Group: Tomi Laurila / VTT Primary contact / supervisor: Tomi Laurila
AALTO7: Cryogenic CMOS

In this position you will develop and model CMOS circuits operating in the cryogenic temperatures. During the last years the interest towards low temperature CMOS circuits has increased because of activities both in quantum computing as well as non-terrestial communications and sensing. In this position you will design, model and measure CMOS circuits developed for RF, analog, mixed mode or digial domains depending on your interests. Additionally, we will engage your research to industrial operation within this field. Microelectronics area: 2, 3 Host location: Aalto University Research Group: Electronic circuit design Primary contact / supervisor: Jussi Ryynänen
AALTO8: Prosessor accelerators

In this position you will develop elements for domain specific systolic array sensor processor accelerators for directed communications. These accelerators will be implemented together with RISC-V microprocessor for optimal energy efficiency-flexibility trade-off in implementation of signal processing. RISC-V and domain specific accelerators are timely research topic in microelectronics circuit design aiming for energy efficient implementations of circuits assisting machine learning and AI applications in energy-scarce operating environment. Microelectronics area: 2, 3 Host location: Aalto University Research Group: Electronic circuit design Primary contact / supervisor: Jussi Ryynänen
AALTO9: Neuromorphic Audio Sensors for AI-driven IoT

Join us in revolutionizing IoT sensor platforms with next generation neuromorphic audio-inference integrated circuits (ICs)! This PhD project focuses on surpassing state-of-the-arts in power efficiency, latency, and neural network accuracy by leveraging advanced time-domain processing techniques. As a researcher, you will design, implement, and verify analog/mixed-signal ICs for audio-inference tasks like keyword spotting, with opportunities for multiple tape-outs. You are expected to have backgrounds in transistor-level analog circuit design, with experience in digital hardware design and PyTorch-based neural networks as a plus. Shape the future of AI-driven IoT devices with us! Microelectronics area: 2, 3 Host location: Aalto University Research Group: Electronic circuit design Primary contact / supervisor: Jussi Ryynänen
AALTO10: 5G FR3 full-duplex transceiver

In this topic you will participate on developing a 5G FR3 transceiver for full-duplex and narrow band-separation frequency-duplex systems. Transmission leakage to reception is a major obstacle in transceivers for such systems. Hybrid self-interference cancellation at both analog and digital domain is a remedy for this issue, but it comes with a penalty of low reception sensitivity. Major challenge for analog self-interference cancellation is the additional noise it introduces for reception. We are developing a method to introduce noise-cancelling scheme to mitigate the issue. In this work you will join an international team that is closely co-operating will some major industrial players. Microelectronics area: 2, 3 Host location: Aalto University Research Group: Electronic circuit design Primary contact / supervisor: Jussi Ryynänen
AALTO11: Intelligent power drives

Energy efficiency of modern power drives on IGBT and GaN technologies can be further boosted with intelligent control circuitry. In this position you will develop both analog and digital CMOS circuits that will tune the operation of the high power devices. The tasks range from device-level studies of the imperfections of the power devices up to development of control algorithms, even powered by AI. This task is closely related to industrial collaboration. Microelectronics area: 1, 2 Host location: Aalto University Research Group: Electronic circuit design Primary contact / supervisor: Jussi Ryynänen
AALTO12: Microelectronics enhanced antennas and em-structures

Circuit and electromagnetic co-design of active antennas. Active antennas integrate circuit components, such as amplifiers, mixers and filters in the radiating structure. Our aim is to avoid pre-defined interface and reduce losses, increase integration level and enable new features. We plan to integrate power amplifiers and low-noise amplifiers in an antenna element. Both amplifiers are biased on and off one at a time to realize Tx/Rx switch. Further, we plan to realize additional load-modulation amplifier in the same element for increased back-off efficiency. We will consider active circulators realized on the antenna element and study active impedance tuning methods to compensate for active impedance effects due to beam steering. Microelectronics area: 1, 2 Host location: Aalto University Research Group: Antennas and wireless sensors Primary contact / supervisor: Ville Viikari
AALTO13: Microelectronics-packaging, integration and rf- interconnects

Integration of integrated circuits and electromagnetic structures. We consider different packaging and coupling mechanisms for integrated circuits and electromagnetic strucutres. We study if non-galvanic coupling can be used to realize RF connections. We also consider chip-integrated antennas and antennas-in-package. We study how to best combine electromagnetic and circuit simulations of the chip that is integrated with an electromagnetic structure. Microelectronics area: 1, 2 Host location: Aalto University Research Group: Antennas and wireless sensors Primary contact / supervisor: Ville Viikari
AALTO14: Telecommunication algorithms accelerators related computer architectures

Telecommunication algorithms accelerators related computer architectures (particularly considering this in the context of RISC-V cores); particularly MAC-layer level accelerators, including new dedicated commands and compilers for flexible use and implementation of such blocks in the product development. Microelectronics area: 3, 4 Host location: Aalto University Research Group: Networked Systems Primary contact / supervisor: Petri Mähönen
AALTO15: Flexible on-silicon supported novel MAC-solutions

Flexible on-silicon supported novel MAC-solutions that support multi-frequency and programmable MAC-structures. Work would include also consideration of interfaces, Programmability, and Compiler techniques -- vision would be to extend successful P4 concepts down to real-time MAC/PHY-interfaces considering on-silicon and Network-on-Chip concepts. Microelectronics area: 3, 4 Host location: Aalto University Research Group: Networked Systems Primary contact / supervisor: Petri Mähönen
AALTO16: Open topic

Applicant may propose a topic that 1) fits to the Aalto's scope of microelectronics research, 2) is well-justified with suffcient background, and 3) can be completed within three-year doctoral studies. Microelectronics area: 1, 2, 3, 4 Host location: Aalto University
TAU1: Advanced TFTs based on low-temperature ALD

This PhD project will focus on high-performance high-k TFT components and circuits on plastic foil based on low-temperature ALD and printing processes. More precisely, the project includes 1) development of low-temperature HfO2-ALD process for gate oxide, 2) applying the developed process with high-accuracy printing to fabricate TFTs, 3) and fabrication of amplifier circuit. Microelectronics area: 1 Host location: Tampere University Research Group: https://research.tuni.fi/lfe/ Primary contact / supervisor: Matti Mäntysalo
TAU2: Ferroelectric diode for intelligent sensing

This PhD project will focus on development of ferroelectric diodes and circuits based on solution processable or low-temperature ALD grown semiconductors and integrated them into proof of concept circuits demontrating self-powered sensing and memory applications. Microelectronics area: 1 Host location: Tampere University Research Group: https://research.tuni.fi/lfe/ Primary contact / supervisor: Matti Mäntysalo
TAU3: Advanced integrated transmitters for 6G

Investigation, architecture, design, and prototyping of an ultra-wideband phase modulator for outphasing transmitters in 6G systems operating in the millimeterwave band (FR2 or FR3) with GHz-range bandwidth. The project also includes development of applicable DSP algorithms and circuit techniques to linearize and correct the analog imperfections in the phase modulator. IC prototyping and measurements in advanced CMOS technologies. Microelectronics area: 2 Host location: Tampere University Research Group: SoC Hub Primary contact / supervisor: Vishnu Unnikrishnan
TAU4: Wideband dataconverters for integrated 6G transceivers

Architecture, circuit techniques, and digital correction algorithms for time-interleaved high-speed ADCs with multi-GHz bandwidths for 6G wireless transceivers. IC prototyping and measurements in advanced CMOS technologies. Microelectronics area: 2 Host location: Tampere University Research Group: SoC Hub Primary contact / supervisor: Vishnu Unnikrishnan
TAU5: Adaptive runtime and compilation techniques for edge SoCs

Compiler and runtime techniques for low latency edge computation and offloading from customized SoCs including application-specific GPUs. Microelectronics area: 3 Host location: Tampere University Research Group: CPC Primary contact / supervisor web page link: Pekka Jääskeläinen
TAU6: Reconfigurable hardware for digital radio baseband for cognitive radio

Research on application-specific digital circuit block architectures and implementations exploiting dedicated reconfiguration functionalities and optimized hardware for low-area low-energy digital radio systems development. The targeted systems may feature resource-limited hardware-accelerated machine learning functionalities for system control as well, which can be an optional research path extension. Microelectronics area: 2, 3, 4 Host location: Tampere University Research Group: Tampere Wireless Primary contact / supervisor: Jari Nurmi
TAU7: SoC Security architecture and processor crypto features

Security architecture for modern (vector) processors and SoCs. Analyzing and implementing Instruction Set Architecture (ISA) extensions for RISC-V to support cryptographic functions. Studying their integration and optimization in modern vector processors. SoC platform security functions such Root-of-Trust (RoT) units. Microelectronics area: 2, 3, 4 Host location: Tampere University Research Group: SoC Hub Primary contact / supervisor: Markku-Juhani Saarinen
TAU8: High-Level Synthesis Productivity

This research focuses on High-Level Synthesis, which aims at automated hardware designs captured by higher abstraction level languages. The main objective is to explore design work productivity in respect of power-performance-area quality. The work includes industrially relevant use cases from signal processing and wireless communication algorithms. Commercial and open-source tools are available for the experimental part. Microelectronics area: 3 Host location: Tampere University Research Group: SoC Hub Primary contact / supervisor: Timo Hämäläinen
TAU9: Model based behavioral HDL code generation

IEEE 1685/IP-XACT standard defines the structure, configurations and memory maps for System-on-Chip designs. Automated tools exist to generate structural HDL and HW dependent SW code. This work addresses modeling the behavioral part that is excluded in IP-XACT and implement a new generator for Kactus2 open source tool. As an example, the generator can create HDL code for the registers and their access logic for the bus side for an IP block. A billion-transistor multiprocessor SoC is used as the target use case. Microelectronics area: 3 Host location: Tampere University Research Group: SoC Hub Primary contact / supervisor: Timo Hämäläinen
TAU10: Low-Power HEVC Video Encoder Implementation on SoC

The primary objective of this PhD project is to develop a real-time video encoder on low-power SoC for High Efficiency Video Coding (HEVC) technology. The research will consist of setting up a semi-automatic high-level synthesis (HLS) design flow from the existing software design of HEVC video encoder to a corresponding ASIC implementation. In addition, it will focus on migrating an existing HEVC encoder implementation from FPGA to ASIC. The work seeks to define the main design steps, techniques, and constraints for implementing a software encoder on ASIC. Particular attention will be paid to identifying the most efficient logic and memory optimization techniques for a hardwired encoder design. The key performance indicators will be coding speed, power consumption, and design cost, which will be used to evaluate software, FPGA, and ASIC encoders. Microelectronics area: 3, 4 Host location: Tampere University Research Group: Ultra Video Group Primary contact / supervisor: Jarno Vanne
TAU11: Highly Optimized Processor-Based Design Methods on Modern SoC for VVC Video Encoder

Tailoring highly complex and data-intensive processes to the diverse architectures of modern SoCs presents significant challenges. This PhD project aims to bridge the gap between theoretical optimization techniques and their practical application in SoC environments. By leveraging extensive knowledge of SoC architectures, this research will focus on ultra-low-level optimizations applicable across a variety of modern architectures, including x86, ARM, and RISC-V. Through a comprehensive comparative analysis of optimization techniques, ranging from autovectorization to intrinsic and assembly, this research aims to propose design methods to optimize the trade-offs between computational efficiency and energy consumption. The coding tools of Versatile Video Coding (VVC) standard will be taken as a use case. Microelectronics area: 4 Host location: Tampere University Research Group: Ultra Video Group Primary contact / supervisor: Jarno Vanne
TAU12: HLS Implementation of VVC Video Coding Tools on FPGA

Amid the rapid evolution of video content and its delivery, the Versatile Video Coding (VVC) standard emerges as a pivotal advancement in compression efficiency. However, the computational demands of these standards pose challenges for real-time applications. A notable research gap exists in identifying the best design practices for implementing individual VVC coding tools on FPGAs. This PhD project proposes to bridge this gap by transitioning from a software-based VVC implementation to an FPGA-optimized framework, selectively offloading computationally intensive coding tools onto FPGA using HLS. The research will explore the intricacies of translating complex video encoding algorithms into efficient hardware designs, assessing the trade-offs between coding efficiency, resource utilization, and power consumption. Microelectronics area: 3, 4 Host location: Tampere University Research Group: Ultra Video Group Primary contact / supervisor: Jarno Vanne
TAU13: Digital predistortion DFE technology for beamforming base-station transmitters

Digital front-end (DFE) and digital predistortion (DPD) constitute to the most complex SoCs in modern base-stations. Classical DPD research and development work focuses on linearizing a single power amlifier (PA). However, modern networks build on antenna arrays, multiuser MIMO, and in the future also hybrid beamforming. Hence, the DPD task is to linearize a bank or array of PAs which is technically much more complicated compared to ordinary single PA linearization. In this PhD research, we focus on this challenging research problem, and develop new understanding and advances in two parallel fronts: Firstly, we address and analyze the impact of feedback signal inaccuracies and underlying hardware tolerances on DPD performance. This covers both per-PA observation and combined/beamformed observation arrangements. The work may also include new ways to observe, e.g, through over-the-air (OTA) coupling. Secondly, we develop new DPD solutions that are robust against different transient phenomena stemming from beam-switching and potentially also due to PA on-off-on switching in TDD systems. The work covers DFE algorithm development and true hardware measurement based experiments and validation. Microelectronics area: 4, 3 Host location: Tampere University Research Group: Tampere Wireless Primary contact / supervisor: Mikko Valkama
TAU14: Privacy-Preserving Analytics, Operations on Encrypted Data, Post-Quantum Cryptography

Applied Cryptography: Designing modern cryptographic schemes to perform operations on encrypted data. We will also look into making the designed schemes quantum-ready. Microelectronics area: 4 Host location: Tampere University Research Group: NISEC Primary contact / supervisor: Antonis Michalas
TAU15: Side-channel analysis of Post-Quantum Cryptography implementations

The project involves the implementation and analysis of side-channel issues that post-quantum cryptography implementations can have. The implementation ranges from software running on microcontrollers to hardware implemented on a FPGAs. Microelectronics area: 2, 3, 4 Host location: Tampere University Research Group: NISEC Primary contact / supervisor: Alejandro Cabrera Aldaya
UOULU1: Hybrid Predistortion for Millimeter-Wave Efficiency Enhanced Power Amplifiers

This project aims to improve the power efficiency and linearity of the analog parts in telecommunication systems by avoiding brute force linearization from over-design and heavy DSP correction. Highly efficient wideband mmW phased array transmitter is implemented including hybrid linearization. On-chip low power analog predistorter provides local linearization capability for high efficiency PAs. RFIC with multiple front-ends is designed and integrated using modern CMOS SOI technology. Microelectronics area: 2, 3 Host location: University of Oulu Research Group: CAS Primary contact / supervisor: Janne P. Aikio
UOULU2: Time-resolving CMOS single-photon detector array for Raman spectroscopy

The main aim of the doctoral research is to develop a time-resolving CMOS single-photon avalanche diode (SPAD) array for pulsed time-of-flight applications (Raman spectroscopy and diffuse optics). The developed integrated circuit should be able to detect hundreds of photons simultaneously within one repetition of the laser pulse. Time-of-arrivals of photons should be measured with the resolution of tens of picoseconds. The development of the SPAD array with large amount of TDCs requires knowledge of analog and digital integrated circuit electronics. The developed integrated circuit consists of delay-locked loops, time-to-digital converters, synchronization blocks and different registers and the data read-out block. Having knowledge of time-resolved single-photon counting, photonics and FPGA circuits is viewed as a beneficial asset for the candidate. Microelectronics area: 3 Host location: University of Oulu Research Group: CAS Primary contact / supervisor: Ilkka Nissinen
UOULU3: SoCs for next-generation processor architecture, neuromorphic computing, and biomedical sensors

Zero-margin energy-frugal computing architectures. The next 10x in energy efficiency will be achieved in CPU, GPU, DSP and ASICs with novel stochastic computation methods that rely on run-time hardware to improve statistical measures of system quality. This requires good understanding of statistical properties of logic properties, and tight supply control loop. Microelectronics area: 3 Host location: University of Oulu Research Group: CAS Primary contact / supervisor: Lauri Koskinen
UOULU4: Visual light communication IoT processing node development

Bio-Inspired Local Processing for Sustainable, Fully-Printed IoT Nodes using SLPIT-NNs (Simultaneous Light Power and Information Transfer, and Neuromorphic networks) Microelectronics area: 3 Host location: University of Oulu Research Group: CAS Primary contact / supervisor: Juha Häkkinen
UOULU5: IC development for single photon diode LIDAR arrays

The group has developed multiple 1D and 2D detector arrays for LiDAR (laser range finding). The circuits include single photon avalanche detectors, ps-level time measuring circuits (TDC, time-to-digital converter), control, data collection, compression, and high-speed data output buses. Microelectronics area: 3 Host location: University of Oulu Research Group: CAS Primary contact / supervisor: Jussi-Pekka Jansson
UOULU6: RF/mmW/sub-THz design approaches using AI/ML techniques

The topic is focused around design techniques that utilize modern and novel approaches that utilize appropriate ML/AI solutions to aid RFIC design at sub-THz region. The target is to find efficient means to improve design productivity and provide optimization techniques in high-performance RFIC design for 6G applications. Microelectronics area: 2 Host location: University of Oulu Research Group: CWC-RT/RF group Primary contact / supervisor: Aarno Pärssinen
UOULU7: Low resolution ADC multi-antenna receiver

The research of this topic aims to develop a functional RF receiver concept for massively parallel multi-antenna transceiver. The first part of the research contains RF receiver dimensioning for the concept by thinking the requirements of all the blocks in an array level. This includes also an ADC architecture analysis and tradeoff study for the multi-antenna concepts. The design efforts will concentrate on the ADC part using a dedicated IC process. Objetive is to design comparator-based spatial quantizer where the signal quantization is divided into multiple parallel antenna paths. The work is planned to be combined with other existing projects to build functional low-resolution ADC receiver unit-cell with multiple antenna inputs. Successful operation of the unit-cell enables building larger antenna panel. Main research questions to answer, and objectives of the work are 1. How ADC resolution reduction impact to the requirements and properties of the rest of the RF chain(s)? 2. What are suitable ADC architectures for the low-resolution MIMO receiver concept and how the ADC circuit design can be brought on the array level by opening the circuit architecture? 3. Design low-resolution ADC cell with multiple inputs as a proof of concept and combine it with other receiver blocks. Microelectronics area: 3 Host location: University of Oulu Research Group: CWC-RT/RF group Primary contact / supervisor: Nuutti Tervo
UOULU8: Sub-THz transmitter IC

Design of transmitter front-end for 6G transmitter concept and improve transmitter test methods at the sub-THz range. The work will be done as part of the 6G flagship RFIC team implementing transceivers for 6G applications at 300 GHz. Microelectronics area: 3 Host location: University of Oulu Research Group: CWC-RT/RF group Primary contact / supervisor: Marko E. Leinonen
UOULU9: Sub-THz On-chip End-fire Antennas

End fire antennas for densely packaged sub-Thz antenna arrays towards future RF SOCs. The ambition of this project is to study a new concept of antenna-RFIC integration and demonstrate the advantages offered by end-fire on-chip antennas. These on-chip antennas are typically radiating at the broadside direction when integrated as a planar structure on top of a chip, limiting potential beamsteering range. The scope of the project includes (a) the identification of suitable IC technologies and tradeoff analysis for potential for the implementation of the on-chip antenna; (b) design of ultrawideband end-fire antennas for potential stacked substrates/chips implementation; (c) potential implementation and evaluation of beamforming characteristics in two planes. Microelectronics area: 2 Host location: University of Oulu Research Group: CWC-RT/RF group Primary contact / supervisor: Jack Soh
UOULU10: Integrating Sensing and Communication SoCs

Improved Data Processing Modules for Integrating Sensing and Communication SoCs: Architecture and Design Microelectronics area: 4 Host location: University of Oulu Research Group: CWC-RT/RF group Primary contact / supervisor: Zaheer Khan
UOULU11: Gradient index structures for sub-THz lens-antenna applications

The project aims at synthesizing dielectric materials and composites, that are to be applied in macroscopic structures having spatially modulated dielectric permittivity. With the help of our research teams at the Microelectronics Research Unit, the doctoral candidate shall design and assemble new types of refractive/diffractive components and then analyze the electromagnetic properties up to sub-THz frequencies. These structures will be utilized in the development of 6G radio equipment and support sustainability goals through material and energy savings. The nature of the research requires background in materials synthesis, processing, characterization as well as basic understanding of electromagnetic wave related phenomena. Accordingly, the candidate is expected to have a degree in physics, chemistry or materials science. Microelectronics area: 1 Host location: University of Oulu Research Group: MIC Primary contact / supervisor: Sami Myllymäki
UOULU12: Smart materials and structures for remote RF sensing

The project focuses on the construction of smart structures, that are then used as sensing elements of stress and strain. Such sensor structures are expected to be read-out remotely using RF antenna, resonator or similar as part of a future 6G radio system. Hands on laboratory experience (lamination, molding, tape casting or alike) as well as background in electrical and RF measurements are necessary to ensure seamless progress with the research. Therefore, the candidate is anticipated to have a degree in materials science, electrical engineering, or in any related fields. Microelectronics area: 1 Host location: University of Oulu Research Group MIC Primary contact / supervisor: Krisztian Kordas
UOULU13: T1: ML assisted prognosis of the reliability of flip chip on board interconnects, T2: Chiplet-to-chiplet interconnection testing and reliabality on novel chiplet interposers

T1: The topic is focusing on estimating the reliability of flip-chip to board interconnection based on machine-learning enhanced prognostics methods. The research includes designing reliability characterization methods, collecting the data, modeling defects and generating algorithms to determine the lifetime of interconnections in various environments. T2: The topic is focusing on finding high-reliability methods for modern chiplet interconnection solutions. Better reliability of open chiplet ecosystem requires standards for testing high-frequency mixed-signal interconnections for detecting and localization of faults. Novel active interposer solutions for chiplets can offer solutions for reliability prognosis through testing. Microelectronics area: 1 Host location: University of Oulu Research Group: MIC Primary contact / supervisor: Jari Hannu
UOULU14: Semiconductor device modeling for analog AI accelerators

The student will work on computational modeling of ferroelectric material-based semiconductor components, namely field-effect transistors, capacitors, and tunnel junctions. Working closely with our collaborators, the models will be calibrated to the devices fabricated and the compact models integrated to an analog accelerator chip design. At a more fundamental level, the aim is to investigate the ultimate scaling limits of ferroelectrics-based devices in terms of speed, energy consumption, and robustness of operation. Microelectronics area: 1 Host location: University of Oulu Research Group: MIC Primary contact / supervisor: Hannu-Pekka Komsa
UOULU15: Chip assembly and interconnects for soft electronic platforms

We are seeking a highly motivated doctoral student to join our research team in the field of chip assembly and interconnects for soft electronic platforms. This position will focus on the development of highly stretchable and possibly self-healable interconnects to advance the capabilities of soft electronics. The successful candidate will work on designing, fabricating, and characterizing novel interconnect materials and structures, aiming to enhance the performance and reliability of electronic systems that conform to irregular surfaces and undergo high mechanical deformation. This research offers an exciting opportunity to contribute to the forefront of flexible electronics and shape the future of wearable devices, biomedical implants, and soft robotics. Strong experimental skills and a passion for interdisciplinary research are essential. Join us in pushing the boundaries of soft electronics and creating innovative solutions for next-generation technologies. Microelectronics area: 1 Host location: University of Oulu Research Group: MIC Primary contact / supervisor: Heli Jantunen
UOULU16: Open topic proposed by the applicant (needs to be well-thought and good background, and fitting to the general microelectronics scheme resembling the above topics).

Check the research areas of the available supervisors, and contact him before submitting the application to discuss if the topic is of mutual interest. You may contact to a) Timo Rahkonen in topics related to (also non-telecomm) IC design, linearisation, design methodologies, b) Aarno Pärssinen in telecom system and IC design, and c) to Jari Juutti in microelectronics material development related topics. Microelectronics area: 1, 2, 3, 4 Host location: University of Oulu Research Group: CWC-RT/RF group Primary contact / supervisor: Timo Rahkonen

Schedule

5 April 2024: Call opens
15 May 2024: Call ends
Work contract starts flexibly between 1 Aug - 31 Dec 2024

Salary

The salary will be based on both the job requirements and the employee’s personal performance in accordance with the salary system of Finnish universities. A typical starting salary for Doctoral Researchers is approximately 2,700 EUR/month. The salary increases based on experience and the progress of doctoral studies.

Requirements

Successful candidates must be pursuing or need be accepted (within the trial period) to study towards a doctoral degree in the doctoral programme of the discipline.

To qualify for these positions, the candidates need to have a Master’s degree (or equivalent eligibility for doctoral studies) from a relevant field. More information on eligibility requirements can be found on each university admission pages.

If you already have a study right for a doctoral degree, it needs to be awarded at the earliest on 1st November 2023 or thereafter for you to be eligible for these positions.

The chosen candidate needs to have the required permits for working in Finland before starting the employment (depending on the nationality of the candidate, e.g. residence permit in Finland).

The position requires fluent written and spoken skills in English. Some doctoral thesis topics may involve special conditions based on the technology, lab, or tool environment characteristics.

How to apply

The positions are offered by the three universities, and you need to send your application to the university offering the topic. The university specific links are following:

Aalto University:

Tampere university:

Doctoral Researcher (Microelectronics MIELi) 10 positions

Oulu University:

PhD in 3 years: 10 Positions for a Doctoral Researcher in Microelectronics pilot training

Select max 3 preferred topic area in the recruitment system.

Please attach the following documents to your application:

MSc degree certificate and their English translations (Finnish and Swedish certificates are also accepted).
Transcripts of all university records and their English translations (Finnish and Swedish certificates are also accepted).
Curriculum vitae according to the TENK template (including the contact details of two people who can provide a reference if needed). Add the list of publications (if any) as a part of the curriculum vitae.
Motivation letter (max. A4 2 pages) with research vision (how you plan to address the research questions, which research methods you would use)

The deadline for applications is 15.5.2024. We will go through applications frequently, and we may invite suitable candidates for an interview already during the application period. Universities reserve the right for justified reasons to leave the position open, to extend the application period and reopen the application process.

Contact persons

Contact person at Tampere University:

Head of the Computing Sciences Unit, professor Timo Hämäläinen, timo.hamalainen@tuni.fi

Contact person at University of Oulu:

Head of Circuits and Systems Research Unit, professor Timo Rahkonen, timo.rahkonen@oulu.fi

MicroElectronics Finland

MicroElectronics Finland (MEF) is a national network of excellence in the highest level of research and education in Finland.

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